There are several platforms available today to a system developer wishing to perform signal processing tasks. These platforms include General Purpose Processors (GPPs), Digital Signal Processors (DSPs), Field Programmable Gate Arrays (FPGAs), Application Specific Integrated Circuits (ASICs) and hardware. GPPs have become increasingly popular platforms for signal processing tasks for several reasons. GPPs, however, present challenges that are not present in traditional signal processing platforms. Even the DSP, which is the platform most similar to the GPP, remains significantly different in architecture and software environments. The differences are even more pronounced when considering the system context.
A DSP is typically placed in a board with a memory and an input/output (I/O) subsystem designed for high-speed data streaming. In contrast, GPPs are typically designed into boards with multilevel cache memory systems tuned for data reuse. GPP board I/O busses focus on interoperability and ease of system integration, rather than simplicity or raw data streaming efficiency. The end result is that GPP chips and boards present a variety of challenges, which a designer attempts overcome in order to achieve efficient signal processing.
It is an important object of the invention to provide a method and apparatus for improving the performance of signal processing applications on GPPs and the like having jitter effects.